In recent years, accompanying a reduction in the size of semiconductor packages, a CSP (Chip Size Package) having a similar size to that of a semiconductor chip and, furthermore, a stacked CSP in which semiconductor chips are stacked in multiple tiers have become widespread (ref. e.g. Japanese Patent Application Laid-open Nos. 2001-279197, 2002-222913, 2002-359346, 2001-308262, and 2004-72009). As examples thereof, there are a package shown in FIG. 1 in which a semiconductor chip A1 is stacked on a substrate 3 having irregularities due to wiring 4, etc., a package shown in FIG. 2 employing at least two semiconductor chips A1 of identical size in which another chip is further stacked over a semiconductor chip having irregularities due to a wire 2, etc. In such packages, an adhesive sheet in which the irregularities are embedded and that can ensure that there is insulation from the upper semiconductor chip is required. In FIG. 1 and FIG. 2, b1 is an adhesive.
In order to fill irregularities due to wiring, wires, etc. it is normally necessary to increase the thickness of the adhesive sheet to more than the height of the irregularities, and to reduce the melt viscosity of the adhesive sheet, thus improving the filling properties. However, an adhesive sheet having a large thickness and a low melt viscosity has the problems that the edges of a semiconductor chip obtained by dicing a wafer and the adhesive sheet are badly damaged and the amount of filamentous waste (resin burrs) increases.
That is, a dicing step normally involves laminating together a wafer, an adhesive sheet, and a dicing tape at 0° C. to 80° C., then simultaneously cutting them by means of a rotating blade, and carrying out washing, thus giving an adhesive-equipped semiconductor chip. In some cases, cutting waste from the adhesive sheet or the wafer becomes attached to a groove of the dicing tape formed after the above cutting process, and it becomes detached from the dicing tape during washing after cutting or when picking up the semiconductor chip, thus forming filamentous waste (resin burrs), which becomes attached to the semiconductor chip and thus contaminates an electrode, etc.
From the above-mentioned points, there is a desire for an adhesive sheet that has excellent dicing properties and excellent filling properties for irregularities due to wiring, wires, etc., and has satisfactory heat resistance and moisture resistance.